/*
*   74502 SAR emulator, on a 22v10
*/
Name            74502-22V10;
Partno          74502;
Revision        01;
Date            5/23/2015;
Designer        Daniel Steck;
Company         University of Oregon;
Location        None;
Assembly        None;
Device          g22v10;

/*** inputs ***/
pin 1 = CP;          /* clock pulse (trig on rising edge) */
pin 2 = !S;          /* start low  */
pin 3 = Din;         /* data */

/*** outputs ***/
pin 14       = !CC;       /* conversion complete low */
pin [15..22] = [Q0..Q7];  /* 8-bit output */
pin 23       = QD;        /* registered/synchronous copy of data input */

/*** intermediate counter variables ***/
C0 = (((!Q7 & Q6 # !Q5) & Q4 # !Q3) & Q2 # !Q1) & Q0 & !CC;
C1 = ((!Q7 # !Q6) & Q5 & Q4 # !Q3 # !Q2) & Q1 & Q0 & !CC;
C2 = (!Q7 # !Q6 # !Q5 # !Q4) & Q3 & Q2 & Q1 & Q0 & !CC;

/*** register inputs ***/
CC.D = !(S # !(!C2 & !C1 & !C0) & !CC);
Q7.D = !S & (C2 & C1 & C0 & Din # !(C2 & C1 & C0) & Q7);
Q6.D = S # ( C2 &  C1 & !C0 & Din # !( C2 &  C1 & !C0) & Q6) & !( C2 &  C1 &  C0);
Q5.D = S # ( C2 & !C1 &  C0 & Din # !( C2 & !C1 &  C0) & Q5) & !( C2 &  C1 & !C0);
Q4.D = S # ( C2 & !C1 & !C0 & Din # !( C2 & !C1 & !C0) & Q4) & !( C2 & !C1 &  C0);
Q3.D = S # (!C2 &  C1 &  C0 & Din # !(!C2 &  C1 &  C0) & Q3) & !( C2 & !C1 & !C0);
Q2.D = S # (!C2 &  C1 & !C0 & Din # !(!C2 &  C1 & !C0) & Q2) & !(!C2 &  C1 &  C0);
Q1.D = S # (!C2 & !C1 &  C0 & Din # !(!C2 & !C1 &  C0) & Q1) & !(!C2 &  C1 & !C0);
Q0.D = S # (!C2 & !C1 & !C0 & !CC & Din # !(!C2 & !C1 & !C0 & !CC) & Q0) & !(!C2 & !C1 &  C0);
QD.D = Din;

/*** handle flip-flop variables set/preset inputs ***/
CC.ar = 'b'0;
Q7.ar = 'b'0;
Q6.ar = 'b'0;
Q5.ar = 'b'0;
Q4.ar = 'b'0;
Q3.ar = 'b'0;
Q2.ar = 'b'0;
Q1.ar = 'b'0;
Q0.ar = 'b'0;
QD.ar = 'b'0;
CC.sp = 'b'0;
Q7.sp = 'b'0;
Q6.sp = 'b'0;
Q5.sp = 'b'0;
Q4.sp = 'b'0;
Q3.sp = 'b'0;
Q2.sp = 'b'0;
Q1.sp = 'b'0;
Q0.sp = 'b'0;
QD.sp = 'b'0;